1. Field of the Invention
The present invention relates to cache based computer systems. More specifically, the present invention relates to optimizing snoop operations that enable a reduction in power consumed by a cache based computer system.
2. Description of the Related Art
Information systems in general have attained widespread use in business as well as personal computing environments. An information handling system, as referred to herein, may be defined as an instrumentality or aggregate of instrumentalities primarily designed to compute, classify, process, transmit, receive, retrieve, originate, switch, store, display, manifest, detect, record, reproduce, handle or utilize any form of information, intelligence or data for business, scientific, control or other purposes. The information handling system may be configured for a specific user application or requirement such as financial transaction processing, airline reservations, enterprise data storage and/or global communications. In general, an information handling system may include a variety of hardware and/or software components that may be configured to provide information and/or consume information. An information handling system may include one or more computer systems, data storage systems, and/or networking systems.
A computer system, which is one common type of information handling system, may be designed to give independent computing power to one or a plurality of users. Computer systems may be found in many forms including, for example, mainframes, minicomputers, workstations, servers, clients, personal computers, Internet terminals, notebooks, personal digital assistants, and embedded systems.
A computer system may be available as a desktop, floor-standing unit, or as a portable unit. The computer system typically includes a microcomputer unit having a processor, volatile and/or non-volatile memory, a display monitor, a keyboard, one or more floppy diskette drives, a hard disc storage device, an optional optical drive, e.g., DVD, CD-R, CD-RW, Combination DVD/CD-RW or CD-ROM, and an optional printer. A computer system also includes an operating system, such as Microsoft Windows XP™ or Linux. A computer system may also include one or a plurality of peripheral devices such as input/output (“I/O”) devices coupled to the system processor to perform specialized functions. Examples of I/O devices include keyboard interfaces with keyboard controllers, floppy diskette drive controllers, modems, sound and video devices, specialized communication devices, and even other computer systems communicating with each other via a network. These I/O devices are typically plugged into connectors of computer system I/O interfaces such as serial interfaces and parallel interfaces, for example. Generally, these computer systems use a system board or motherboard to electrically interconnect these devices.
Computer systems also typically include basic input/output system (“BIOS”) programs to ease programmer/user interaction with the computer system devices. More specifically, BIOS provides a software interface between the system hardware and the operating system/application program. The operating system (“OS”) and application program may typically access BIOS rather than directly manipulating I/O ports, registers, and control words of the specific system hardware. Well known device drivers and interrupt handlers access BIOS, for example, to facilitate I/O data transfer between peripheral devices and the OS, application program, and data storage elements. BIOS is accessed through an interface of software interrupts and contains a plurality of entry points corresponding respectively to the different interrupts. In operation, BIOS is typically loaded from a BIOS ROM or BIOS EPROM, where it is nonvolatily stored, to main memory from which it is executed. This practice is referred to as “shadowing” or “shadow RAM” and increases the speed at which BIOS executes.
Although the processor provides the “brains” of the computer system, I/O communication between an I/O device and the processor forms a basic feature of computer systems. Many I/O devices include specialized hardware working in conjunction with OS specific device drivers and BIOS routines to perform functions such as information transfer between the processor and external devices, such as modems and printers, coupled to I/O devices.
Cache memory subsystems are prevalent within modern-day computer systems and are well known. For example, cache memory subsystems are described in U.S. Pat. No. 5,623,633 to Zellar, et al. and U.S. Pat. No. 5,809,537 to Itskin, et al. A cache is typically a small, higher speed, higher performance memory system which stores the most recently used instructions or data from a larger but slower memory system. Programs frequently use a subset of instructions or data repeatedly. As a result, the cache is a cost effective method of enhancing the memory system in a ‘statistical’ method, without having to resort to the expense of making the entire memory system faster.
For example, when the processor performs a read (fetch) operation, the processor will first check to see if the data requested by the processor is in the cache. If the data requested by the processor is in the cache, then the cache provides the data quickly to the processor, without having to access the relatively slower main memory (e.g., typically DRAM or ROM). If the data is not in the cache, the processor fetches the data needed from DRAM or ROM, and also stores a copy in the cache (assuming the ‘page’ of the address has been marked as ‘cacheable’ by system software). Now this data is available in the cache if the processor requests the data again. The larger the cache, the more data the cache can store, and the more likely it is for the requested item to be in the cache.
An Nth level cache is typically N−1 levels away from the processor. A higher level cache generally includes a higher latency period compared to the latency period associated with a lower level cache.
Power management subsystems are known within modern-day computer systems. Exemplary power management subsystems are described in, for example, U.S. Pat. No. 6,085,330 to Hewitt, et al.
The following are hereby incorporated by reference: U.S. Pat. No. 5,623,633 to Zellar, et al., U.S. Pat. No. 5,809,537 to Itskin, et al., and U.S. Pat. No. 6,085,330 to Hewitt, et al.